In recent years, semiconductor devices such as a digital LSI (Large Scale Integrated circuit) have achieved a remarkably high integration, a remarkably high function, and a remarkable increase in size. Thus, it is important to verify functions of the LSI in a design stage. The verification of the LSI before manufacture is especially important in order to avoid re-manufacturing or the like as well.
When verifying the LSI, it is a common practice to enumerate the functions of the LSI and verify each of the functions.
In a conventional LSI design approach, the functions of the LSI are manually enumerated. For this reason, omission of the enumeration may occur.
Further, in the conventional LSI design approach, in addition to verification by enumerating all the functions, appropriateness of verification is measured by using other indicators. One of the indicators is a toggle rate (described in Non-patent Document 1). The toggle rate indicates a signal change rate when an operation of a circuit has been finished, and is obtained by an expression of (L+H)/2N. L indicates the number of signals which have been changed from a logical 1 to a logical 0, H indicates the number of signals which have been changed from the logical 0 to the logical 1, and N indicates the number of all the signals that are present in the circuit. For obtaining the toggle rate, information (changes) on all the signals in the LSI is necessary.    Patent Document 1:    JP Patent Kokai Publication No. JP-A-01-026243    Non-Patent Document 1:    D. Drako and P. Cohen, “HDL Verification Coverage,” Integrated System Design Magazine, pp. 46-52, June 1998.